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Title:
AUTOMATIC LEVEL CONTROL CIRCUIT
Document Type and Number:
Japanese Patent JPS6468011
Kind Code:
A
Abstract:

PURPOSE: To realize an automatic level control circuit with a MOS integrated circuit by converting the variance of an input level to the change of the sampling frequency of a first switched capacitor and moving the frequency characteristic curve of a filter in parallel to compensate the variance of the input level.

CONSTITUTION: All of used operational amplifiers consist of MOSFETs. An input level vi, an output vRE of a rectifier 1, an oscillation frequency fs of a voltage controlled oscillator(VCO) 2, and an output v4 of a switched capacitor filter(SCF) 4 in the reference state are vio, vREO, fso, and v40 respectively, and the output vRE of the rectifier 1 is changed to aVREO when the input level vi is changed to avio. As the result, the oscillation frequency fs of the VCO 2 is changed to afso. That is, when the sampling frequency is raised by (a)-number of times in SCFs 4 and 5, the frequency characteristic is moved in parallel in the direction of the frequency base because the cut-off frequency is raised by (a)-number of times also. Thus, the automatic level control circuit is realized with the MOS integrated circuit.


Inventors:
ODA TOSHIAKI
Application Number:
JP22600287A
Publication Date:
March 14, 1989
Filing Date:
September 08, 1987
Export Citation:
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Assignee:
NEC CORP
International Classes:
H03H19/00; (IPC1-7): H03H19/00
Attorney, Agent or Firm:
Uchihara Shin



 
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