Title:
AUTOMATIC TRANSACTION PROCESSOR
Document Type and Number:
Japanese Patent JPS553055
Kind Code:
A
Abstract:
PURPOSE:To secure an appropriate allotment to each post-processor for the split- type transaction device by providing the memory device with every post-processor and altering the memory contents deciding the allotment to the post-processor with every transaction. CONSTITUTION:The necessary data supplied from pre-processor 1 is transferred to terminal control unit 3 via interface 2 and then given a collation through communication with the center. With permission for the transaction given, the more necessary data is supplied from processor 1 to be transferred to unit 3. Unit 3 possesses the memory devices to each post-processor 4 and memorizes the process queuing number for processor 4. Based on this queuing number, which processor 4 the transaction should be allotted to is decided. As a result, the process queuing number of the memory device is renewed, and the number of processor 4 allotted is informed to processor 1.
Inventors:
KITAJIMA HIROYUKI
NAKAMURA TAKASHI
NAKAMURA KIYUUGO
NAKAMURA TAKASHI
NAKAMURA KIYUUGO
Application Number:
JP7537578A
Publication Date:
January 10, 1980
Filing Date:
June 23, 1978
Export Citation:
Assignee:
HITACHI LTD
International Classes:
G07F7/08; G06Q20/18; G06Q40/00; G06Q40/02; G07F7/10; G07G5/00; (IPC1-7): G06F15/30; G07F7/10; G07G5/00
Domestic Patent References:
| JPS52110542A | 1977-09-16 | |||
| JPS51108547A | 1976-09-25 | |||
| JPS5210647A | 1977-01-27 |
Next Patent: JPH0553056