DIGITAL VIDEO SIGNAL PROCESSOR

Japanese Patent JP3181354

B2

PURPOSE: To improve the degree of freedom of function and system revision by storing a required constant to plural storage sections for operands in the case of specific constant number arithmetic operation processing for each class and using plural constants selectively in response to a signal format of an input video signal so as to realize sophisticated arithmetic operation at a high speed.
CONSTITUTION: In the case of making arithmetic operation to a high speed signal in which different signals are subjected to time axis multiplexing such as High Vision signals, coefficients 1, 2 are stored in advance to plural local registers of a multiplier 15(1) and the stored coefficients 1, 2 are selectively outputted alternately by using an internal selector C4 at the same rate for inputs 1, 2. The read coefficients 1, 2 are sent to the multiplier 15(1). The multiplier 15(1) uses a variable delay circuit C1 to delay an input signal thereby making coefficient input timing of them coincident and the result is multiplied. The inputs 1, 2 subjected to gain control are outputted through a selector 11. In this case, the control program for each operand and selector is stored in a table and the control program is read from the table in response to the given instruction and given to the relevant operand and selector.

JP2574079	[Title of Invention] Image signal separation method and apparatus
JPH08305888	IMAGE DATA PROCESSOR

Nobuyuki Sasaki
Hideki Saito
Yuji Konno
Nobuyuki Yagi
Kazuo Fukui
Kazumasa Enami

JP5529192A

July 03, 2001

March 13, 1992

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Toshiba Corporation
Japan Broadcasting Corporation

H04N5/262; H04N7/00; H04N7/015; (IPC1-7): H04N5/262; H04N7/015

JP1206777A
JP1206778A
JP1236383A
JP5260373A
JP5260374A
JP5260377A

Takehiko Suzue

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