PURPOSE: To allow the method to cope with a burst error in a BCH code with simple configuration by comparing a counted value of the number of pieces of non-zero with a maximum value of the number of error correction bits among output bits of a feedback shift register.
CONSTITUTION: The BCH code error correction circuit is provided with a feedback shift register 11 representing a BCH code generation polynomial, a count means 23 counting the number of pieces of non-zero in each output bit of the feedback shift register 11, and a comparator means 25 compares the count value of the counter means 23 with a maximum value of the number of preset error correction bits. Then the feedback shift register representing the BCH code generation polynomial is used to count the number of pieces of non-zero of the syndrome and shift is repeated till the number reaches a maximum value of the number of error correction bits to correct simply a burst error of a BCH code efficiently.
Next Patent: DATA COMPRESSION AND EXPANSION SYSTEM AND DISK ARRAY DEVICE