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Patent Searching and Data


Title:
BINARY COUNTER
Document Type and Number:
Japanese Patent JPH08223028
Kind Code:
A
Abstract:

PURPOSE: To reduce the scale and the power consumption of an apparatus and to improve the reliability of a binary counter by securing the same connection among the JK flip-flops and the logical combination circuits and controllings optionally the count-up and stop operations of the counter.

CONSTITUTION: A binary counter consists of the 1st and 2nd OR circuits 1a and 1b, a 1st AND circuit 2, the 1st and 2nd logical inverting circuits 3a and 3b, the 1st to 4th JK flip-flops 4a to 4d, and the 1st to 3rd logical combination circuits 5a to 5c. The binary outputs which count up and down the counter are obtained from the Q and XQ outputs of those logical circuits respectively. That is, these circuits construct a binary counter and therefore the count-up and down operations of the counter can be optionally controlled.


Inventors:
HANDA SHIGEO
SUGAWARA AKIRA
Application Number:
JP2385895A
Publication Date:
August 30, 1996
Filing Date:
February 13, 1995
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H03K21/38; H03K23/00; (IPC1-7): H03K21/38; H03K23/00
Attorney, Agent or Firm:
Teiichi