Title:
BUS CONTROL SYSTEM
Document Type and Number:
Japanese Patent JP2000315128
Kind Code:
A
Abstract:
To realize the speed-up of a bus cycle.
Registers Ra 11, Rb 12, Rc 13, Rd 14 for limiting currents allowed to flow into respective devices (A) 1, (B) 2, (C) 3, (D) 4 are connected to a data bus, and in the case of switching the bus cycle of respective devices 1 to 4, the bus cycle is switched without setting up an idle cycle for preventing the collision of bus signals.
Inventors:
OGUCHI MASASHI
SAKAI HIROAKI
HORIKOSHI MIKA
SAKAI HIROAKI
HORIKOSHI MIKA
Application Number:
JP12486999A
Publication Date:
November 14, 2000
Filing Date:
April 30, 1999
Export Citation:
Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G06F3/00; G06F13/362; H04L12/40; (IPC1-7): G06F3/00; G06F13/362; H04L12/40
Attorney, Agent or Firm:
Hiroaki Tazawa (1 person outside)
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