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Title:
D級増幅器の重心補償
Document Type and Number:
Japanese Patent JP4954442
Kind Code:
B2
Abstract:
A Class-D Amplifier with PCM (Pulse Code Modulated) input signal where the output pulse width can be adjusted to provide a constant time-voltage-area or the output pulse width may have one of several discrete values to provide a multi-level output system. A fundamental idea of this disclosure is to assure the center of each output pulse is always positioned at the nominal clock or with a fixed delay relative to the nominal clock. Said Class-D Amplifier typically converts the input signal into PDM (Pulse Density Modulated) pulses with a Sigma Delta Modulator (21) and typically drives the output load (26) with an H-Bridge (25).

Inventors:
Johann Nilsson
Lars Renatoson
Horst Knoedgen
Application Number:
JP2003413285A
Publication Date:
June 13, 2012
Filing Date:
December 11, 2003
Export Citation:
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Assignee:
Dialok Semiconductor GM Behr
International Classes:
H03F3/217; H03K17/687; H03F1/32; H03K5/05; H03K7/08
Domestic Patent References:
JP2001517393A
JP7015248A
JP2002252527A
JP63176020A
JP3159409A
Foreign References:
US6404280
EP0310170A1
Attorney, Agent or Firm:
Kazuo Shamoto
Tadashi Masui
Yasushi Kobayashi
Akio Chiba
Hiroyuki Tomita
Fumitoshi Nishiyama



 
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