Title:
トランザクショナル・メモリ用サポートを備えるシステムでの、トランザクションに関するロック変数の確認
Document Type and Number:
Japanese Patent JP7165725
Kind Code:
B2
Abstract:
In an apparatus (2) with transactional memory support, a predetermined type of transaction start instruction or a subsequent instruction following the predetermined type of transaction start instruction triggers capture of a lock identifier which identifies a lock variable for controlling exclusive access to at least one resource. In response to a predetermined type of transaction end instruction which follows the predetermined type of transaction start instruction, the lock variable is checked and commitment of results of speculatively executed instructions of the transaction is prevented or deferred when the lock variable indicates that another thread holds the exclusive access to the target resource. This approach can improve performance when executing transactions in a transactional memory based system.
Inventors:
Horsenell, Matthew James
Diestelhorst, Stephan
Diestelhorst, Stephan
Application Number:
JP2020517825A
Publication Date:
November 04, 2022
Filing Date:
August 30, 2018
Export Citation:
Assignee:
Arm limited
International Classes:
G06F9/46; G06F9/30; G06F9/34; G06F9/52
Domestic Patent References:
| JP2014194754A | ||||
| JP2017509970A | ||||
| JP2018511119A |
Foreign References:
| US20140281236 | ||||
| WO2016139446A1 |
Attorney, Agent or Firm:
Patent Attorney Corporation Asamura Patent Office