PURPOSE: To check the clearance land (solid areas divided by clearance lands) which are caused in the solid areas of an inner power layer of a printed circuit board on a printed circuit board CAD system.

CONSTITUTION: A contour shape group A is acquired among the power solid pattern groups of power layers. Then a contour shape group B is acquired by applying the subtractive synthesization of the contour shape of a clearance land group of the power layers to the group A. A contour shape group C that is not included in other contour shapes is extracted out of the group B. Then it is checked whether the group C is divided or not. If divided, the divided parts are extracted. If not divided or when the divided parts ar extracted, a contour shape group D is acquired by excluding the group C out of the group B. Then a contour shape group E which is not included in other contour shapes is extracted out of the group D. Then a contour shape group F acquired by excluding the group E out of the group D, i.e., a clearance land island serving as an area where the power is not supplied yet is extracted.