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Patent Searching and Data


Title:
CHROMINANCE SIGNAL LINE DISCRIMINATING CIRCUIT
Document Type and Number:
Japanese Patent JPS6477390
Kind Code:
A
Abstract:
PURPOSE:To execute a line discrimination without an adjustment but accurately and stably by detecting the ID frequency of a previous line and a present line for every line, using the comparative output of the frequency of the obtained previous line and present line to discriminate the line, in a SECAM system. CONSTITUTION:In a flip flop 12, the rise of a burst flag signal from an input terminal 11 is detected, a Q output and a Q' output whose levels invert every horizontal period are formed and as the outputs of AND circuits 13 and 14, outputs to become higher level in the non-modulating carrier interval of a FM- modulated line sequentializing chrominance signal to be supplied to an input terminal 1 are alternately formed every horizontal period. By this output, switching circuits 3 and 5 are controlled, the level of a line ID signal is sampled and held by capacitor 4 and 6 alternately every horizontal period and the two are compared in a comparing circuit 7. In an Ex-OR circuit 9, an exclusive OR of the comparative output of the comparing circuit 7 and the Q output on the flip flop 12 are formed and removed from an output terminal as a line discriminating signal.

Inventors:
YOSHIDA AKIYUKI
TAKANO KENJI
Application Number:
JP23378887A
Publication Date:
March 23, 1989
Filing Date:
September 18, 1987
Export Citation:
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Assignee:
SONY CORP
International Classes:
H04N9/87; H04N9/47; (IPC1-7): H04N9/47; H04N9/87
Attorney, Agent or Firm:
Masatomo Sugiura