To easily generate a new clock signal with a fixed cycle time from a clock signal obtained by dividing a rational-number frequency without necessity of larger circuit area or large power consumption.

A clock pulse excluding a timing when any clock pulse exists is selected as a clock pulse to be removed in clock signals C with a fixed cycle time that are generated from clock signals B among M clock pulses of clock signals S by a mask control circuit 20A, and a mask signal indicating a timing of the selected clock pulse is generated. The clock pulse of the clock signal S is removed by a mask circuit 10A according to a mask signal 25A generated by the mask control circuit 20A, so as to generate a clock signal B.