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Title:
COMPARATOR CIRCUIT
Document Type and Number:
Japanese Patent JPH05215789
Kind Code:
A
Abstract:

PURPOSE: To construct a comparator circuit of a smaller number of circuit elements to output the results of a judgment on difference in comparison be tween an input current and a reference current.

CONSTITUTION: A two-stage construction of a preamplifier circuit and a comparison/latch circuit divided in the past are consolidated into one stage. In an amplification mode, a latch circuit drive signal is set to 'L' to turn ON MOS transistors M1 and M4 so that an input voltage VIN is applied to the base of a third bipolar transistor Q3. In a comparison/latch mode, a latch circuit drive signal is set to 'H' to turn OFF the MOS transistors M1 and M4 while MOS transistors M2 and M3 are turned ON.


Inventors:
NAKADAI NAOTOSHI
Application Number:
JP31816591A
Publication Date:
August 24, 1993
Filing Date:
December 02, 1991
Export Citation:
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Assignee:
NEC CORP
International Classes:
G01R19/165; H03K5/08; H03M1/34; H03M1/36; (IPC1-7): G01R19/165; H03K5/08; H03M1/34; H03M1/36
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)



 
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