PURPOSE: To eliminate the defective Vth as well as to easily perform gate oxidization for the titled semiconductor device by a method wherein the film thickness tox dependency of the gate oxide film of threshold voltage Vth is reduced for the MISFET of an n-channel and a p-channel.

CONSTITUTION: The gate electrode 2 of the n-channel MISFET is formed using a p+ type polycrystalline Si, and the gate electrode 4 of the p-channel MISFET 3 is formed using an n+ type polycrystalline Si. Through these procedures, especially the gate electrode 2 of the n-channel MISFET 1 is formed using the p+ type polycrystalline Si, and this enables to remarkably reduce the tox dependency of the Vth. As a result, the defective Vth generating due to the variation of the tox can be eliminated both in the n-channel and p-channel MISFET of the CMOS relating to this invention, and the variation in the film thickness of the gate oxide film generating while a gate oxidization process is performed can be ignored, thereby enabling to perform gate oxidization easily with leeway.