PURPOSE: To realize a complementary signal output circuit comprising a MESFET offering ease of circuit integration without losing the driving capability by providing a level shift means additionally to output a normal complementary signal.

CONSTITUTION: TR1∼TRN are made up of MESFETs, RL1∼RL4 are active load resistors comprising depletion MESFETs and D1∼D3 are Schottky diodes. A signal fed to the drain of the TR 1 while using the RL1 as the load resistor is outputted inversely at its drain. The TRs 2∼4 form a pseudo complementary output circuit similar to a conventional circuit, but even when a level '1' is supplied to the TRs 1, 3, 5, since each gate connects to a Schottky diode (D1∼D3), connecting points (a), (b) are clamped to 1.4V and the TR 4 is also driven sufficiently. Thus, the complementary signal output circuit with a normal output is obtained. Since the circuit constitution is manufactured by the same MESFET process, the circuit integration is also facilitated.