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Patent Searching and Data


Title:
EXTERNAL SYNCHRONIZING CIRCUIT
Document Type and Number:
Japanese Patent JPS63272224
Kind Code:
A
Abstract:

PURPOSE: To prevent malfunction of a sequential control circuit due to the disturbance in the transition of the internal state by counting the period in response to the internal state of the sequential control circuit at a point of time of an external synchronizing signal is inputted to stop the operation of the sequential control circuit during the counting time.

CONSTITUTION: With an external synchronizing signal 6 inputted to an external synchronizing circuit, a value 10 corresponding to an internal state 9 of the sequential control circuit 2 is set to a counter circuit 4 at that point of time. A control signal 12 in response to the count 11 of the circuit 4 is outputted by a decoder 5 and an inhibition gate 1 stops the clock 8. The circuit 4 continues counting according to a clock 7 and the count is continued till a stop signal 14 of the counter circuit 4 is outputted. The control signal 12 is switched when the count 11 becomes a prescribed value, the clock 8 is outputted and the sequence control circuit 2 restarts the operation.


Inventors:
HAGIWARA YASUAKI
SATO HISAO
NASU HIROAKI
ABE SUKEYUKI
Application Number:
JP10770887A
Publication Date:
November 09, 1988
Filing Date:
April 30, 1987
Export Citation:
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Assignee:
SEIKO EPSON CORP
International Classes:
H03K5/135; G06F1/04; H03K21/00; H03K23/00; H03K23/58; H03K23/66; (IPC1-7): G06F1/04; H03K5/135; H03K23/58; H03K23/66
Domestic Patent References:
JPS54148454U1979-10-16
Attorney, Agent or Firm:
Kisaburo Suzuki (1 outside)