Title:
COMPUTING METHOD FOR RESIDUE MULTIPLICATION DEVICE
Document Type and Number:
Japanese Patent JP3277220
Kind Code:
B2
Abstract:
PURPOSE: To carry out the residue multiplication processing even in a system where the memory area of an IC card, etc., is limited.
CONSTITUTION: The product (r×C) of a radix (r) and a work variable C is added to the product (A×Bi) of the input variables A and Bi (0≤i≤n-1). Thus the addition result C is obtained. Then the product of the quotient Q of the approximate C/N using the C and a higher-order digit of an input variable N, this variable N and the radix (r) is subtracted from the C so that the residue is obtained. This residue is stored in the area of the C. Then (i) is subtracted one by one from i=n-1 and this operation is repeated. Under such conditions, the higher-order digit (r×Cn+1+Cn) of the C is divided by a divisor obtained by adding 1 to the higher-order digit Nn-1 of the variable N. Thus the quotient Q is obtained. Thus it is assured that the C is always positive when (C-r×Q×N) is processed.
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Inventors:
Hikaru Morita
Emperor Yang
Emperor Yang
Application Number:
JP5033692A
Publication Date:
April 22, 2002
Filing Date:
March 09, 1992
Export Citation:
Assignee:
Nippon Telegraph and Telephone Corporation
International Classes:
G06F7/52; G06F7/493; G06F7/523; G06F7/72; (IPC1-7): G06F7/52; G06F7/72
Domestic Patent References:
| JP371332A |
Attorney, Agent or Firm:
Masatoshi Isomura