To provide a congestion controller that consists of a counter by simplifying the configuration and control of a cell input control section and a cell output control section.

In the case that cells of a threshold level or over are not stored in a buffer 2, a cell input control section 5 passes cells independently of a state of a cell loss priority CLP bit whether it is set to a priority state or a non- priority state. In the case that number of storage cells in the buffer 2 reaches the threshold level or over because of reception of lots of cells. The cell input control section 5 monitors the CLP bit of a received cell and passes the cell whose CLP bit indicates a priority bit and aborts the cell in the case of the cell whose CLP bit indicates a non-priority bit through the control of the cell. When lots of cells are received and number of stored cells in the buffer reaches a limit, the cell input control section 5 aborts all cells independently of a state of the cell loss priority CLP bit whether it is set to a priority state or a non- priority state.