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Patent Searching and Data


Title:
CONTROL SYSTEM FOR VIDEO MEMORY
Document Type and Number:
Japanese Patent JPS6433644
Kind Code:
A
Abstract:

PURPOSE: To effectively increase the printing speed by securing such a constitution where all data stored in a memory is always cleared in both single sheet or multi-sheet printing modes when a reading action is through with a relevant page and it is not required to write an erasion signal (zero data) into the entire area of a single page when the picture data on the next page is written.

CONSTITUTION: A write control signal Ws is outputted from a CPU in a reading cycle right before a writing action of the picture data on the next page in both single sheet and multi-sheet print modes of each page. An AND is secured between the signal Ws and a write pulse signal WR via a gate circuit 5 and the signals are delivered toward a video memory 1 based on a read timing mode. Then the zero data is written into the memory 1 corresponding to the address which is read out in parallel with the reading action of the picture data. The data stored in said address are successively erased. Therefore all data are cleared in the memory 1 when the reading action is through with the relevant page in both print modes. Thus the effective and high-speed memory control is attained.


Inventors:
NAGATA KATSUMI
NAKAKAWAJI SHUICHI
Application Number:
JP18894587A
Publication Date:
February 03, 1989
Filing Date:
July 30, 1987
Export Citation:
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Assignee:
KYOCERA CORP
International Classes:
B41J2/00; B41J3/00; B41J5/30; G06F3/12; G06F12/00; G06F12/02; G06K15/12; G11C7/00; H04N1/21; H04N1/40; (IPC1-7): B41J3/00; B41J5/30; G06F3/12; G06F12/00; G06F12/02; G06K15/12; G11C7/00; H04N1/21; H04N1/40
Domestic Patent References:
JPS60134334A1985-07-17
JPS61264379A1986-11-22
Attorney, Agent or Firm:
Takahashi Masahisa