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Patent Searching and Data


Title:
COUNTER CIRCUIT
Document Type and Number:
Japanese Patent JPH01286520
Kind Code:
A
Abstract:

PURPOSE: To increase number of bits of a counter without decreasing the operating frequency by detecting overflow for each block and executing reload of a data.

CONSTITUTION: A critical path exists in a low-order block and has a maximum of 12 stages, and a load capacity to a reload signal RLDA is for four gates comprising flip-flops F1, F2 and two gates and it is constant independently of number of bits of a high-order block. Moreover, the critical path in the high-order block is ten stages and the load capacity is for five gates, then the reloading is slow, but since reloading of the high-order block has only to be executed while overflow takes place in the low-order block, no high speed operation is required toward the low-order block. Thus, the reload counter whose operating frequency is not lowered is obtained even if number of bits of the counter 1 is increased.


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Inventors:
KONNO HARUTSUGU
Application Number:
JP11470588A
Publication Date:
November 17, 1989
Filing Date:
May 13, 1988
Export Citation:
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Assignee:
HITACHI LTD
HITACHI MICROCUMPUTER ENG
International Classes:
H03K23/00; H03K23/86; (IPC1-7): H03K23/86
Attorney, Agent or Firm:
Katsuo Ogawa (1 person outside)