PURPOSE: To provide the counter circuit which is operated regardless of disappearance of a load pulse (LD) and is operated in accordance with the deviated load pulse LD in the case of deviation of LD from the initial LD.

CONSTITUTION: This counter circuit consists of counters 1 and 2 which are initialized and started by the pulse inputted to load terminals, a circuit 3 which takes the LD and a CO pulse of the counter 1 as the input and inhibits output of the LD to the load terminal of the counter 1 at the time of input of the first CO pulse of the counter 1, a circuit 4 which takes the CO pulse of the counter 1 and the LD as the input and outputs a pulse to input it to the load terminal of the counter 2 in the case of deviation of the LD from the CO pulse timing, a circuit 5 which takes the LD and CO pulses of counters 1 and 2 as the input and outputs a pulse when the LD is deviated from the timing of the CO pulse of the counter 1 and is matched to that of the counter 2, and a circuit 6 which takes output pulses of circuits 3 and 5 and the CO pulse of the counter 1 as the input and inputs inputted pulses to the load terminal of the counter 1.