PURPOSE: To provide the counter circuit in which one selector circuit and one test data input section connecting to the input side of the selector circuit are enough for the purpose.

CONSTITUTION: The circuit is provided with a selector 1 which selects output of test data to a shift path input terminal of a flip-flop 2 connecting to an adder 3 corresponding to a least significant digit when a test data selection signal is received by the selector and selects output of a shift path from a pre-stage to the input terminal of the flip-flop 2 in other cases, and with an OR circuit 4 receiving a shift mode selection signal and a test mode selection signal and controlling the connection of an input output terminal of the N-sets of the flip-flop circuits 2 and an internal D flip-flop based on the output, and all the flip-flop circuits 2 form a shift path when the shift mode selection signal or the test mode selection signal is received. Furthermore, when the test mode selection signal is inputted, the test data are inputted to each of the flip-flop circuits 2 via the selector 1.