PURPOSE: To constitute a counter circuit by applying the information of the counter of pre-stage to a carry control circuit of the next stage via an AND circuit constituting a carry control circuit without increasing the fan-out umber of the counter.

CONSTITUTION: Outputs QA, QA of a counter 71 of the 1st stage are fed only to a carry control circuit 101, and the outputs of AND circuits 111, 112 constituting the carry control circuit 101 are inputted respectively to AND circuts 113, 114 of the carry control circuit 102. Through the constitution above, the input number inputted to the AND circuits constituting the carry control circuit of the final stage is only the output of the counter of the pre-stage, the output of the carry control circuit of the pre-stage and a clock and the input signal number of the carry control circuit of the final stage is only the output of the counter of the pre-stage, the output of the carry control circuit of the pre- stage and a signal having a number added to a clock signal to them. Thus, even when the counter is constituted by multi-stage, the increase in the input number of the carry control circuit is suppressed and said circuit is suited for integrated circuit.