To provide a counter which can perform counting operation continuously, while inspecting counting function.
This counter is provided with 1st and 2nd counting parts 10 and 20, when the 1st counting part 10 counts pulse generation cycles of a number of revolution detecting means 1 according to a reference clock, the 2nd counting part 20 inspects the counting function with an inspection signal and when the 1st counting part 10 inspects the counting function with an inspection signal, the 2nd counting part 20 counts pulse generated cycles of the number of revolutions detecting means 1 according to the reference clock. The decision outputs of the counting parts 10 and 20 are ORed by an OR gate 4, whose output is used as a final decision output.
SHIRAI TOSHIHITO