Title:
DATA PROCESSING SYSTEM
Document Type and Number:
Japanese Patent JP3896372
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To facilitate processing of initially writing a program to be executed by a data processor to a nonvolatile memory.
SOLUTION: A second data processor (101) includes a nonvolatile memory (107) which is made writable by a first data processor (100) in a first operation mode after a reset operation is canceled. a CPU (109) which takes the volatile memory as an instruction fetch object after the write operation in the first operation mode, and an electrically reprogrammable nonvolatile memory (502) which is taken as an instruction fetch object by the CPU in a second operation mode after the reset operation is canceled. The first data processor designates the first operation mode to the second data processor and stores a write control program therefor to the volatile memory and permits the CPU to fetch the instruction. The second data processor executes the write control program written in the volatile memory to initially write an operation program of the first data processor to the nonvolatile memory.
Inventors:
Junichi Nishimoto
Takuichiro Nakazawa
Yamada Koji
Toshihiro Hattori
Takuichiro Nakazawa
Yamada Koji
Toshihiro Hattori
Application Number:
JP2004345686A
Publication Date:
March 22, 2007
Filing Date:
November 30, 2004
Export Citation:
Assignee:
Renesas Technology Corp.
International Classes:
G06F11/00; G06F1/32; G06F15/177; G06F9/445; G06F12/06; G06F13/10; G06F13/36; G06F13/38; G06F13/40; (IPC1-7): G06F9/445; G06F11/00; G06F12/06; G06F15/177
Domestic Patent References:
| JP7036704A | ||||
| JP9190353A | ||||
| JP63128837A | ||||
| JP8037546A | ||||
| JP8274821A | ||||
| JP2000298585A | ||||
| JP6139063A | ||||
| JP4276838A |
Attorney, Agent or Firm:
Shizuyo Tamamura
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