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Title:
DATA PROCESSOR AND ITS BUS CONTROL METHOD
Document Type and Number:
Japanese Patent JP3784994
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To enhance the performance of a system handling both an AV stream and computer data by realizing data transfer between nodes on an internal bus in a pier-to-pier form.
SOLUTION: A multimedia bus 200 is an internal bus where two transfer modes, that is, a band guarantee cycle and an Async cycle of an event driven type are defined. In the band guarantee cycle, transfer of stream data between nodes is executed in a pier-to-pier from by using a band reserved for each cycle time. Three control methods, 1) flow control where data transmission in a reserved band cycle is stopped under control from a reception node, 2) control of executing stream access in the Async cycle, and 3) control of accepting the Async cycle even during the reserved band cycle are prepared for the control of the band guarantee cycle using the reserved band.


Inventors:
Yasuhiro Ishibashi
Application Number:
JP14841399A
Publication Date:
June 14, 2006
Filing Date:
May 27, 1999
Export Citation:
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Assignee:
Toshiba Corporation
International Classes:
G06F13/12; G06F13/362; H04L12/40; G06F13/42; H04L12/403; (IPC1-7): H04L12/40; G06F13/12
Domestic Patent References:
JP10285564A
JP10228355A
JP10285196A
JP10093598A
JP10200573A
Attorney, Agent or Firm:
Takehiko Suzue
Sadao Muramatsu
Atsushi Tsuboi
Ryo Hashimoto
Satoshi Kono
Makoto Nakamura
Shoji Kawai