PURPOSE: To efficiently perform data transfer processing at a data processor having a cache memory on the bus of an MPU.
CONSTITUTION: Concerning configuration with which DMA transfer is performed and data are inputted/outputted under the control of a bus switching part 108 between a printing part 104 of a serial printer and a main storage RAM 107, a cache memory part 109 having a data cache holding part and a data holding part is provided on the bus of an MPU 102. The bus switching part 108 performs control for connecting the main storage RAM 107 to the bus of the MPU 102 or any bus excepting for the MPU 102 and while the MPU 102 performs a cache operation for reading data out of the data holding part of the cache memory part 109, data in the main storage RAM 107 are inputted/outputted by connecting a data holding part 114 to any bus excepting for the MPU under the control of the bus switching part 108.
WATAYA MASAFUMI
KAMURAGI YOSHIAKI
TANAKA SOHEI
SUZUKI NORIYUKI
UEMURA HIROSHI
