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Patent Searching and Data


Title:
DATA SPEED SETTING SYSTEM
Document Type and Number:
Japanese Patent JP01194622
Kind Code:
A
Abstract:

PURPOSE: To always transmit data even when much noise or distortion exist on a transmission path by setting a data speed according to the size of the equalizing residual quantity (error signal) of an automatic equalizer at the time of training completion.

CONSTITUTION: When a training signal is sent from a modem 15, the training signal through the transmission path is received by a modem 16, tap updating is carried out by an automatic equalizer 2, and the training is carried out. A rate sequence is generated in a rate sequence generating circuit 10 so that a rate sequence may be set at the signal at the higher data speed, when the output signal in a averaging circuit 6 is smaller than a threshold value TH 8 at the time of the training completion, and the rate sequence may be set at the signal at the lower data speed in a contrary case. the generated rate sequence is constituted as the training signal by a training signal generating circuit 11, and sent to the transmission path through a modulating part 12. The sent training signal is received by the modem 15, and in the same way, the training of an automatic equalizer 2 is carried out.


Inventors:
Kokuryo, Garo
Application Number:
JP1988000018833
Publication Date:
August 04, 1989
Filing Date:
January 29, 1988
Export Citation:
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Assignee:
HITACHI DENSHI LTD
International Classes:
H04L1/00; H04B3/10; H04L13/00; H04L29/08; H04L1/00; H04B3/04; H04L13/00; H04L29/08; (IPC1-7): H04B3/10; H04L1/00; H04L13/00