Title:
MONITOR SIGNAL GENERATION INSERTING CIRCUIT
Document Type and Number:
Japanese Patent JPH01194621
Kind Code:
A
Abstract:
PURPOSE:To decrease a circuit size by constituting a converting circuit which consists of a nonlinear/linear converting circuit, a monitor signal generating circuit and an inserting circuit with special reading elements. CONSTITUTION:In the generation inserting circuit of the monitor signal in a trans-multiplexer to mutually convert the SSB.FDM signal of an analog transmission path and the PCM signal of a digital transmission path, since a PCM signal (d) is optimately digital-signal-processed in the trans-multiplexer, the arrangement of a channel is converted in an arrangement converting circuit 11, and thereafter, the signal is inputted to a converting circuit 15. The converting circuit 15 consists of a nonlinear/linear converting circuit 12 to convert a nonlinear code into a linear code, a monitor signal generating circuit 13 to generate a monitor signal (e), and an inserting circuit 14 to insert the monitor signal (e). The nonlinear/linear converting circuit 12 is replaced with a data pattern to convert the nonlinear code to the linear code so as to follow a CCITTG 711, and the monitor signal generating circuit 13 is replaced to the linear code pattern of the monitor signal (e), and thus, constituting the converting circuit 15 with the special reading elements.
Inventors:
SHINOZAKI KOJI
SASAKI ATSUSHI
SASAKI ATSUSHI
Application Number:
JP1883188A
Publication Date:
August 04, 1989
Filing Date:
January 29, 1988
Export Citation:
Assignee:
NEC CORP
MIYAGI NIPPON DENKI KK
MIYAGI NIPPON DENKI KK
International Classes:
H04J1/00; H04B3/46; H04B17/00; H04J3/00; H04J3/14; H04J4/00; (IPC1-7): H04B17/00; H04J1/00; H04J3/00; H04J3/14
Attorney, Agent or Firm:
Masaki Yamakawa (2 outside)