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Patent Searching and Data


Title:
DC LEVEL DIFFERENCE CORRECTING CIRCUIT
Document Type and Number:
Japanese Patent JPS6181083
Kind Code:
A
Abstract:

PURPOSE: To correct the DC level difference of every 1H without lowering resolution by detecting the DC level difference of every 1H from the differential signal between a signal 1H before and present signals of video signals, making the level difference to DC, and controlling a limiter circuit by the DC level.

CONSTITUTION: An output obtained by multiplying a differential signal Y-YD by amplification α is obtained in a substracting circuit 3. An output of the subtracting circuit 3 is inputted to a limiter circuit 5 through an amplifier 4. Both the amplifier 4 and limiter circuit 5 have amplification degrees β,γ respectively. On the other hand, an output of the subtracting circuit 3 gates the place of level difference other than video part by using a gate pulse of a figure c in a gate circuit 7, and outputs a sample signal of a figure d. The signal is rectified by a full-wave rectifier circuit 8 and a capacitor 9, and converted to a DC voltage ΔV' of a figure f. Accordingly, the DC voltage ΔV' is applied to a controlling circuit 10, and the limiter level of the limiter circuit 5 is changed by the controlling circuit 10 based on the voltage ΔV'. A correction output in which DC level difference is averaged can be obtained by this output of the limiter circuit 5.


Inventors:
SASAKI YASUSHI
Application Number:
JP20369584A
Publication Date:
April 24, 1986
Filing Date:
September 28, 1984
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H04N5/16; H04N5/92; H04N5/922; (IPC1-7): H04N5/16; H04N5/92
Attorney, Agent or Firm:
Susumu Ito