PURPOSE: To find a quotient through high-speed processing in a small number of steps without any correction by initializing partial quotient registers of a decimal dividing device to 0 and -1, or 9 and +1 according to the indication of an FF.

CONSTITUTION: This device is controlled by a microprogram to calculate partial quotients successively by a subtraction and an addition loop, thereby obtaining a quotient of decimal division. A decimal arithmetic circuit is specified in operation mode of subtraction or addition by the FF205 whose arithmetic mode is set with a division microinstruction to perform specific arithmetic. A gate circuit 206 outputs the carry output 120 of the decimal arithmetic circuit as a branch condition to a microprogram control part 207 by inversion or as it is. Further, a register 203 is provided to counts up or down by one in counting operation after the specific arithmetic of the decimal arithmetic circuit according to the contents of the FF205.