Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
DELAY DETECTOR
Document Type and Number:
Japanese Patent JPH0918534
Kind Code:
A
Abstract:

PURPOSE: To prevent the error rate of demodulated data of a PSK modulated wave form becoming worse against fading accompanied by a phase shift.

CONSTITUTION: A received electric field level detection part 1 detects the level of an IF signal S1 in synchronism with a sampling clock signal CL2 and outputs (n) received electric field level signals SO for every symbol. A phase error calculation part 6 receives a phase difference signal S5 and a demodulated signal S6 from the input side and output side of a multivalued decision part 5, and calculates and outputs the phase error as a phase error signal S7. A weighting part 8 multiplies the value of a phase error square signal S8 generated by a phase error calculation part 6 and an error squaring part 7 by the values of the received electric field level signals SO. A selector control part 9 detects the time when the value of the phase error square signal S9 weighted with the received electric field becomes minimum and outputs a select signal S10. A selector control part 9 selects one of (n) demodulated signals S6 according to the select signal S10.


More Like This:
Inventors:
WAKIZAKA YOSHIKI
Application Number:
JP16045495A
Publication Date:
January 17, 1997
Filing Date:
June 27, 1995
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NIPPON DENKI SAITAMA KK
International Classes:
H04L27/227; H04L27/22; (IPC1-7): H04L27/227
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)