To provide a delay locked loop in which harmonic lock is completely prevented.

The delay locked loop is provided with a delay unit, a harmonic lock preventing unit, an electric charge pump, a filter and a start-up circuit. The delay unit receives an input clock signal CLKIN, generates an output clock signal CLKOUT delayed by prescribed phases than this input clock signal CLKIN and further generates multiple delay signals d1 to dm having differently delayed phases from the input clock signal CLKIN. The harmonic lock preventing unit receives the input clock signal CLKIN and the multiple delay signals d1 to dm and detects the phase difference of the multiple delayed signals d1 to dm. When this phase difference exceeds a prescribed range, this is detected. Then, the output clock signal CLKOUT is exactly synchronized with the input clock signal CLKIN such that the approach of the output clock sihnal CLKOUT to the harmonic lock state can be prevented.