Title:
DEMODULATOR AND DATA RECORDER HAVING THE SAME
Document Type and Number:
Japanese Patent JP3958269
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a demodulator for a phase modulated signal such as a wobbling signal capable of suppressing an increase in demodulation error caused by noise superposition or the like, and to provide a data recorder having the same.
SOLUTION: Within the signal range of a bit signal which can be inserted in synchronization with a detected bit synchronous signal Bsync, the integrated values S2 of wobbling signals at a cycle where a phase change as a bit signal is expected are subjected to predetermined coding operations and totalled, whereby the characteristic amounts S13 and S16 of respective bit signals of "1" and "0" are calculated. Then, on the basis of the result of comparing the characteristic amounts with each other, the value of a bit signal corresponding to the bit synchronous signal Bsync is determined.
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Inventors:
Shigeeda Akio
Daimaru Makoto
Daimaru Makoto
Application Number:
JP2003317495A
Publication Date:
August 15, 2007
Filing Date:
September 09, 2003
Export Citation:
Assignee:
Texas Instruments Japan Ltd.
International Classes:
G11B20/14; H02J7/00; G11B7/005; G11B20/10; G11B27/24; H01M10/44; H04L27/22; (IPC1-7): G11B20/14; G11B7/005; H04L27/22
Domestic Patent References:
| JP2003123257A | ||||
| JP2003085749A | ||||
| JP2001209937A |
Attorney, Agent or Firm:
Takahisa Sato