Title:
【発明の名称】閉込電子電界放出デバイスおよび製造プロセス
Document Type and Number:
Japanese Patent JP2002503019
Kind Code:
A
Abstract:
A lateral-emitter field emission device (10) has a gate (60) that is separated by an insulating layer (80) from a vaccum- or gas-filled microchamber environment (20) containing other elements of the device (10). For example, the gate (60) may be disposed external to the microchamber (20). The insulating layer (80) is disposed such that there is no vaccum- or gas-filled path to the gate for electrons that are emitted from a lateral emitter (40, 100). The insulating layer (70, 80) disposed between the emitter and the gate preferably comprises a material having a dielectric constant greater than one. The insulating layer also preferably has a low secondary electron yield over the device's operative range of electron energies. For display applications, the insulating layer is preferably transparent. Emitted electrons are confined to the microchamber (20) containing their emitter (100). Thus, the gate current component of the emitter current consists of displacement current only. This displacement current is a result of any change in potential of the gate relative to other elements such as, for example, relative to the emitter. Direct electron current from the emitter to the gate is prevented. An array of the devices comprises an array of microchambers, so that electron current from each emitter (100) can reach only the anode (50, 55) in the same microchamber, even for diode devices lacking a gate electrode (60). A fabrication process (S1-S28) is specially adapted for fabricating the device and arrays of such devices.
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Inventors:
Potter, Michael, Di
Application Number:
JP2000530926A
Publication Date:
January 29, 2002
Filing Date:
February 06, 1999
Export Citation:
Assignee:
Advanced Vision Technologies, Inc.
International Classes:
H01J1/304; H01J3/02; H01J9/02; H01J29/04; H01J31/12; (IPC1-7): H01J1/304; H01J9/02; H01J29/04; H01J31/12
Attorney, Agent or Firm:
Akira Asamura (3 outside)