PURPOSE: To simplify the circuit constitution and make parts and devices common, by transferring sequentially the simple pulse-form terminal designation signal, which is sent from the central equipment, among respective terminal equipments to designate individual terminals.

CONSTITUTION: Central equipment CE and terminal equipments TE1 and TE2 are connected commonly by clock circuit CL and signal circuit SL, and the central equipment and each terminal are cascaded by terminal designating circuits AL1W AL3. Pulse-form terminal designation signal (a) is sent synchronously from equipment CE, and is applied to shift register SR1 of terminal TE1 and is shifted by clock pulse CP and is applied as terminal designation signal (b) to the next terminal TE2. Signal (b) is shifted in shift register SR2 and becomes the next terminal designation signal (c) and is sent to each terminal sequentially. While signal (a) and (b) are generated, terminals TE1 and TE2 are designated, and the signal from circuit SL synchronizing this duration is held in AND gate latch circuit group AGL.