Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
HARMONIZER FOR COMPETITIVE SIGNAL
Document Type and Number:
Japanese Patent JPS5621218
Kind Code:
A
Abstract:

PURPOSE: To simplify the resource assigning algorithm of random nature, by using the counter driven with oscillation and giving permission when the request signal from the processor and the counter value are in coincidence.

CONSTITUTION: In the system competing the same information source a synchronizingly from a plurality of sets of mutual independent processors 1001W100N and obtaining the information resource, the counter 300 is provided. The counter is taken as the N notation counter if the processors are N sets. The counter 300 is driven with the transmitter 200. The value of the counter 300 is decoded at the decoder 400 and logical product is obtained for the information resource request signal of the processor and the value of the decoder 400 at the logical product circuits 5001W 500N, and the information resource approval signal is returned to the processor. Simultaneously, the logical sum of signal from the processor is obtained at the logical sum circuit 600 and the oscillator 200 is stopped with the output.


Inventors:
OOMIYA TETSUO
Application Number:
JP9784079A
Publication Date:
February 27, 1981
Filing Date:
July 30, 1979
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NIPPON ELECTRIC CO
International Classes:
G06F9/48; G06F3/00; G06F9/46; G06F13/366; G06F15/16; (IPC1-7): G06F3/00; G06F9/46; G06F15/16
Domestic Patent References:
JPS5347737A1978-04-28
JPS5232645A1977-03-12
JPS5150619A1976-05-04
JPS48100030A1973-12-18