PURPOSE: To detect a phase quickly, by detecting a phase difference between AC voltage and current on a basis of a DC voltage level which is the output of a means which averages and synthesizes outputs of sample holding means in DC and adds a prescribed bias quantity.
CONSTITUTION: Respective zero crossing times of a voltage and a current are detected by a detected data operating circuit 10, polarity inverters NOTi, and NAND gates NANDi to generate prescribed logical conditions, and information concerning the time difference of zero crossing are sampled in sample holding circuits 20I and 20II on a basis of said logical condition output, and output states are shifted from each other by the phase difference of a half cycle. Outputs of circuits 20I and 20II are averaged and synthesized in DC by an amplifying circuit 30, and a prescribed bias quantity is added to them, and the phase difference between AC voltage and current is detected on a basis of a DC voltage level proportional to the time difference attained as the output of this synthesizing means.
JPS4997664A | 1974-09-14 |
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