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Patent Searching and Data


Title:
DETECTING-SYSTEM CIRCUIT
Document Type and Number:
Japanese Patent JPH11248759
Kind Code:
A
Abstract:

To automatically remove a DC offset which is mixed with a spectrum in an apparatus such as an electron spin resonance(ESR) apparatus or a nuclear magnetic resonance(NMR) apparatus.

A zero-correction circuit is composed of an amplifier circuit which uses two operational amplifiers 12, 13. A charging circuit which is composed of a capacitor C and of a resistance R1 is installed at the later-stage operational amplifier 13. A spectrum which is input is amplified by the amplifier circuit which is composed of the operational amplifier 12, it is output, and it is input to the later-stage amplifier circuit 13 so as to be amplified. At this time, the DC level of the spectrum appears at the capacitor C at the time constant of the charging circuit, and the level is negatively fed back to the front- stage operational amplifier 12 by 3 resistance R2. As a result, when the DC level of the spectrum is deviated from a zero level, the DC level of the spectrum is canceled. Consequently, the spectrum in which the DC level is corrected to the zero level is obtained at the output of the zero-correction circuit.


Inventors:
TOKUNO TAMIO
NAGAI SOUICHI
Application Number:
JP4710998A
Publication Date:
September 17, 1999
Filing Date:
February 27, 1998
Export Citation:
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Assignee:
JEOL LTD
International Classes:
G01R19/00; A61B5/055; G01R33/32; (IPC1-7): G01R19/00; A61B5/055; G01R33/32
Attorney, Agent or Firm:
Hideo Sugai (7 others)