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Title:
REMOVAL CIRCUIT FOR NORMAL-MODE NOISE
Document Type and Number:
Japanese Patent JPH11248758
Kind Code:
A
Abstract:

To provide a removal circuit in which an input can be changed over at high speed, by installing a digital signal processing circuit which removes both normal-mode noises at 50 Hz and 60 Hz with reference to an A/D- converted digital value.

A digital data computing unit 4 is connected to the later stage of an A/D converter 3. Signal lines H1, H2, L1, L2, Hn, Ln from an object to be measured are connected to a multiplexer 1 which changes over (n) pieces of inputs, and signals are selected sequentially. Then, the selected signals are amplified by a preamplifier 2, and an analog value is converted into a digital value by an integration-type A/D converter 3. Then, a digital signal processing operation which removes both normal-mode noises at 50 Hz and 60 Hz is performed by the digital data computing unit 4. A measured value 200 in which the normal-mode noises are removed by its output can be obtained.


Inventors:
NAKANO SHINICHI
Application Number:
JP5326198A
Publication Date:
September 17, 1999
Filing Date:
March 05, 1998
Export Citation:
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Assignee:
YOKOGAWA ELECTRIC CORP
International Classes:
G01R19/00; (IPC1-7): G01R19/00



 
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