Title:
DEVICE HAVING NONVOLATILE MEMORY CAPABLE OF ELECTRIC ERASURE ,AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JPH08213573
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To propose a memory device with which independent programming can be performed at the different part of a memory and to propose the method of manufacturing the device that is simple and meets the requirement of increasing integrating density. SOLUTION: A device has one or more of memory cells of a floating grid type having a source 16 and a drain 18 separated by a channel region 14 in a memory region. The device has the means 44 and 38 of applying memory cell erasing voltage to the channel region 14 independent from adjacent memory cells as the result of complete electrical insulation or the insulation of each region.
Inventors:
JIYOERU AATOMAN
Application Number:
JP29153095A
Publication Date:
August 20, 1996
Filing Date:
November 09, 1995
Export Citation:
Assignee:
COMMISSARIAT ENERGIE ATOMIQUE
International Classes:
H01L21/8247; H01L27/115; H01L27/12; H01L29/788; H01L29/792; (IPC1-7): H01L27/115; H01L27/12; H01L21/8247; H01L29/788; H01L29/792
Attorney, Agent or Firm:
Masatake Shiga (2 outside)
Previous Patent: NONVOLATILE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
Next Patent: GATE ARRAY DEVICE AND ITS MANUFACTURE
Next Patent: GATE ARRAY DEVICE AND ITS MANUFACTURE