Title:
DEVICE AND METHOD FOR BUS ENCODING/DECODING
Document Type and Number:
Japanese Patent JP3695329
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To provide a device and method for bus-encoding/decoding for a low power digital signal processor system using a narrow data bus.
SOLUTION: This device is provided with a conditional inverting means for inverting lower (n-1) bit data by bit units when the value of the most significant bit of n bit data is 1, a storing means for storing the last n bit data outputted to a bus, and a first exclusive logical sum calculating means for calculating the exclusive logical sum of the lower (n-1) bit data conditionally inverted by the conditional inverting means and the lower (n-1) bit data stored in the storing means by bit units. Then, the most significant bit data of the n bit data and the (n-1) bit data calculated as the exclusive logical sum by the first exclusive logical sum calculating means are outputted.
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Inventors:
Spicy English
Samsung Electronics Co.,Ltd.
Minoru Hei
Zhang Ei
Samsung Electronics Co.,Ltd.
Minoru Hei
Zhang Ei
Application Number:
JP2000392190A
Publication Date:
September 14, 2005
Filing Date:
December 25, 2000
Export Citation:
Assignee:
Samsung Electronics Co.,Ltd.
International Classes:
G06F7/00; G06F13/14; G06F13/42; H03M5/04; (IPC1-7): G06F7/00; H03M5/04
Domestic Patent References:
| JP9186607A | ||||
| JP5135187A |
Attorney, Agent or Firm:
Yukio Ono
Tomoko Inazumi
Yoshio Miyagawa
Tomoko Inazumi
Yoshio Miyagawa