Title:
DEVICE AND METHOD FOR CIPHER PROCESSING WITH OPTIONALLY SELECTIVE STATUS ENCODING
Document Type and Number:
Japanese Patent JP2693881
Kind Code:
B2
Abstract:
PURPOSE: To attain ciphering and deciphering at a network speed without requiring any special processing capability by increasing the speed and efficiency of cipher processing.
CONSTITUTION: In an FDDI network, a processor 16' is positioned between a media access control MAC sublayer 10 and a ring memory controller RCM 12. An information packet is analyzed to determine whether or not ciphered data are included and when included, the data are deciphered before being forwarded. An outgoing information packet is ciphered in its data part when called out and is normally forwarded to a network communication media direction. A bidirectional ciphering process is attained in real time when respective packets are transmitted through the processor. Outgoing information packet process loops the process information back in a reverse direction and attains ciphering or deciphering by using an additional data path.
Inventors:
Amagupta
William Earl Harway
Mark F Kemp
Chinshu Lee
Butler Wu Lampson
Barry A Spiny
Joseph Jay Tord
Charles W. Kaufman
BJ Harbison
Morley gasser
William Earl Harway
Mark F Kemp
Chinshu Lee
Butler Wu Lampson
Barry A Spiny
Joseph Jay Tord
Charles W. Kaufman
BJ Harbison
Morley gasser
Application Number:
JP15497091A
Publication Date:
December 24, 1997
Filing Date:
June 27, 1991
Export Citation:
Assignee:
Digital Equipment Corporation
International Classes:
H04L29/06; H04L9/00; H04L9/10; H04L9/12; H04L29/02; (IPC1-7): H04L9/12; H04L12/28; H04L12/56; H04L29/06
Domestic Patent References:
| JPS5534532A | ||||
| JPS60260254A | ||||
| JPS62155642A | ||||
| JPH02100439A | ||||
| JP64038029B |
Foreign References:
| EP0353927A2 | ||||
| US4914652A |
Attorney, Agent or Firm:
Minoru Nakamura (7 outside)