To provide a wafer level burn-in device and a wafer level burn-in method for preventing a probe from being exhausted and burned, by reducing an electric load applied to a wafer simultaneously and suppressing the transitional rise of the temperature of the wafer.
The wafer level burn-in device and the wafer level burn-in method have an electric load application apparatus 105 for distributing each chip on the semiconductor wafer 101 into at least two groups, and giving an electric load to the chip of each group asynchronously, thus screening the semiconductor chip. With this configuration, the electric load applied to the semiconductor wafer 101 simultaneously is reduced and the transitional rise of the temperature of the semiconductor wafer is suppressed, thus preventing the probe from being exhausted and burned.
TERANISHI MASATOSHI
Yoshihiro Morimoto
Toshiji Sasahara
Yohei Harada