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Patent Searching and Data


Title:
I/O DEVICE
Document Type and Number:
Japanese Patent JPS6345664
Kind Code:
A
Abstract:

PURPOSE: To easily eliminate the difference of positive/negative logics between a controller and an external device by adding an inverting circuit consisting of a logic gate which inverts freely the positive/negative logics of data on a data bus in response to changeover of a switch to the data bus.

CONSTITUTION: An inverting circuit 21 is added to a data bus DB and this circuit 21 contains exclusive OR gates 5 set on each line L of a data bus DB, a pull-up resistance R and a switch SW1. The data on the bus DB are supplied to an input terminal (b) and at the same time each terminal (a) of the gates 5 are set in common at logic '1' or '0' in response to an open state after the SW1 is closed. That is, the terminal (a) is set at logic '0' and then logic '1' when the SW1 is closed and opened respectively. Thus the data on the bus DB are delivered as they are through the gates 5 as long as the SW1 is kept closed. While the data on the bus DB are delivered with logic inversion since the gates 5 are set at logic '1' respectively as long as the SW1 is kept opened.


Inventors:
KONDO TATSUO
Application Number:
JP18997586A
Publication Date:
February 26, 1988
Filing Date:
August 13, 1986
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC WORKS LTD
International Classes:
G05B15/02; G05B19/02; G05B19/05; G06F13/10; G06F13/38; (IPC1-7): G05B15/02; G05B19/02; G06F13/10; G06F13/38
Attorney, Agent or Firm:
Ishida Choshichi