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Title:
DIAGNOSIS BACK-UP CIRCUIT FOR MICROPROCESSOR
Document Type and Number:
Japanese Patent JPS5451346
Kind Code:
A
Abstract:

PURPOSE: To simplify the fault diagnosis and debugging of a micro-processor, by dynamically stopping the running program of the micropresessor at any address and by starting a back-up program.

CONSTITUTION: An address pattern is set by address setting switch 8 and transferred to register 10, where it is held. Further, it is converted into time-division data by multiplexer 11 and then inputted to comparator 12. In comparator 12, the content of the program counter of the microprocessor on bus line 4 is compared with the address pattern mentioned above and its result is transmitted to timing control circuit 9. At this time, when switch group 13 is DHLT and an agre ement is obtained through the comparison, the operation code of the sub-branch instruction generated by pattern gererqtor 16 and the address pattern are transmitted in sequence via bus line 4 after multiplexer 17. When switch part 13 is SPRT, the contents of ROM14 for back-up program storage are transmitted via bus line 4 as a substitute for the running program


Inventors:
SHIMOJIMA KENJI
Application Number:
JP11718577A
Publication Date:
April 23, 1979
Filing Date:
September 29, 1977
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
G06F11/28; G06F11/00; (IPC1-7): G06F11/00



 
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