DIGITAL ADAPTATION CIRCUITRY AND METHOD FOR PROGRAMMABLE LOGIC DEVICES

Title:

DIGITAL ADAPTATION CIRCUITRY AND METHOD FOR PROGRAMMABLE LOGIC DEVICES

Document Type and Number:

Japanese Patent JP2008072716

Kind Code:

A

Abstract:

To provide digital adaptation circuitry and method for programmable logic devices.

This method provides for controlling equalization of an incoming data signal. The method includes detecting two successive differently valued bits in the data signal, determining whether transition in the incoming data signal between those bits occurs relatively late or relatively early, and increasing the equalization of the incoming data signal if it is relatively late.

Inventors:

WONG WILSON
CHAN DORIS PO CHING
SHUMARAYEV SERGEY
MAANGAT SIMARDEEP
HOANG TIM TRI
LAI TIN H
TRAN THUNGOC M

Application Number:

JP2007237202A

Publication Date:

March 27, 2008

Filing Date:

September 12, 2007

Export Citation:

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