Title:
DIGITAL AUDIO-MEMORY COMMUNICATION SYSTEM
Document Type and Number:
Japanese Patent JPH07240723
Kind Code:
A
Abstract:
PURPOSE: To perform transmission and play-back at different speeds by providing a signal conversion circuit for converting digital data to analog data and a timing circuit for clock operating signals for indicating a voice message from a memory at a second data speed. CONSTITUTION: The receiver 14 of this digital voice storage system 10 receives an incoming signal to input it to a decoder 16 and the decoder 16 emit an enable signal when an input signal code matches with a decoder address. A control means 18 for switching, resetting and controlling the circuit of the system 10 controls and activates the system 10 in response to the enable signal from the decoder 16. The incoming signal is converted from analog to a digital format in a signal conversion means 20 and stored in the memory 22 and the means 18 calls the message from the memory 22, converts it from digital to analog for reproduction and outputs it through an audible amplifier 24 to a speaker. The decoder 16 is provided with a timer, ends the enable signal when the time set beforehand is ended in response to the timer and stores a new message in the memory 22.
Inventors:
HERUFUERITSUHI RICHIYAADO JIEI
Application Number:
JP16166394A
Publication Date:
September 12, 1995
Filing Date:
July 14, 1994
Export Citation:
Assignee:
HELFERICH RICHARD J
International Classes:
H03M1/12; H03M1/02; H04B1/66; H04B14/04; H04Q11/04; H04W84/00; H04W84/02; (IPC1-7): H04B14/04; H04B1/66; H04Q7/16
Attorney, Agent or Firm:
Fukami Hisaro (2 outside)
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