PURPOSE: To materialize the circuit technology suitable for circuit integration by using a synchronizing signal and a signal synchronously with the synchronization of one line of a received serial data string so as to regulate the shift operation thereby generating a required synchronizing signal without the use of a delay circuit.
CONSTITUTION: Each bit of an input serial data string is incorporated into an S/P 1 in order synchronizing with a clock signal CKI and outputted in parallel while being collected by n-bit each. Each bit form the S/P 1 is latched in an LT 3 in a rising timing of a synchronizing signal CKE outputted from a DEV 2 and outputted to an X driver 4 as display data in the unit of n-bit from the LT 3. A synchronizing signal XCK' generated by a synchronizing signal generating means 20 includes the synchronizing signal CKE itself or a signal synchronously with it and includes a signal synchronized with the synchronization of one line of the received data string. The signal XLT is generated by a shift circuit 21.
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TANAHASHI RIKURO
UEDA TOSHIO
KURIYAMA HIROHITO
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