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Patent Searching and Data


Title:
DIGITAL DIFFERENTIAL ANALYZER
Document Type and Number:
Japanese Patent JPS5513409
Kind Code:
A
Abstract:

PURPOSE: To secure the free variation of the operation speed at the arithmetic part by securing an optional switching use of the output of both the variable frequency oscillator and the basic oscillator.

CONSTITUTION: Change-over switch S is provided at the output side of basic oscillator FFG. And when switch S is at the side of contact 1, the output of FFG is given to waveform shaping unit WF. Thus operation part OP performs the operation in the standard operation speed. When S is switched to the side of contact 2, the output of variable transmitter VFG is supplied instead of the output of FFG. Thus the pulse cycle canges in accordance with the output frequency of VFG, and accordingly the relative relationship of the clock pulse cycle changes constantly. As a result, each time is decided based on the output frequency of VFG for the period and one interlation. Thus, OP can be operated in an optional speed with the higher limit of the highest response speed of OP.


Inventors:
JIYOU AKIO
Application Number:
JP8395478A
Publication Date:
January 30, 1980
Filing Date:
July 12, 1978
Export Citation:
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Assignee:
HITACHI ELECTRONICS
International Classes:
G06F7/64; (IPC1-7): G06F7/64