To continue a speech even when communication is interrupted by measuring a time just before a main power supply voltage is dropped and just after the voltage is restored and recovering a system time required for synchronization of the system and a code phase through the use of a high speed clock signal.

While a code phase use high speed clock 12 is given to a code phase update FF10, a microprocessor 6 monitors a time count use free run timer 4. Whether or not a time to be switched to a usual clock elapses is checked by obtaining a restoration timing for switch changeover to the clock used for a conventional speech operation through the calculation. When the time switched to the conventional clock elapses, the processor 6 operates changeover switches 21, 22. A clock input to a system time update FF 3 and a code phase update FF 10 is switched to a system time clock source 8 and a code phase clock source 11 which generate a clock signal used for the usual operation respectively.